| Employee ID | 53059 | ||||||
| Salutation (Prof./ Dr.) | Dr. | ||||||
| Name | PRITAM BHATTACHARJEE | ||||||
| Designation | ASSISTANT PROFESSOR (SENIOR GRADE 2) | ||||||
| School/Centre | ELECTRONICS ENGINEERING | ||||||
| Mobile No. | +91 8132863424, +91 9475009083 | ||||||
| Educational details (Please mention all the degrees with latest first) | |||||||
| Degree | Passed out year | Specialization | Institute/University/ College | ||||
| Ph.D. | 2020 | Low-power VLSI & IC Design | National Institute of Technology, Arunachal Pradesh | ||||
| M.Tech | 2013 | VLSI Design | Heritage Institute of Technology, Kolkata, West Bengal | ||||
| B.Tech | 2011 | Electronics & Communication Engineering | Institute of Science & Technology, Paschim Midnapore, West Bengal | ||||
| Post-Doctoral Experience (if any) | Graduate Technical Intern, GTCHE, Intel Bangalore | ||||||
| Research Details | |||||||
| Areas of Specialization | VLSI Circuits, full-custom IC design, Low Power VLSI | ||||||
| ORCID ID | 0000-0002-1968-1622 | ||||||
| Scopus ID | 56500112700 | ||||||
| H-index (scopus) | 5 | ||||||
| Google Scholar ID | https://scholar.google.com/citations?user=43yT8EgAAAAJ&hl=en | ||||||
| i10 index | 3 | ||||||
| On-going Consultancy Project Details | |||||||
| On-going Consultancy Project Title | Funding Agency | ||||||
| NIL | |||||||
| Completed Consultancy Project Details | |||||||
| Completed Consultancy Project Title | Funding Agency | ||||||
| NIL | |||||||
| Ongoing Funded Project Details | |||||||
| Ongoing Funded Project Title | Funding Agency | ||||||
| NIL | |||||||
| Completed Funded Project Details | |||||||
| Completed Funded Project Title | Funding Agency | ||||||
| NIL | |||||||
| Patent Published Details | |||||||
| Patent Published Title | Patent Published Application No. | ||||||
| Voltage Keeper Based Robust Flip-Flop for Low Power Applications | Indian Patent Application No. 201731044358 (Kolkata) | ||||||
| Book / Book Chapter Published Details | |||||||
| Title | Publisher | Year | |||||
| Understanding of On-Chip Power Supply Noise: Suppression Methodologies and Challenges | IntechOpen Limited, United Kingdom | 2019 | |||||
| Awards & Recognition Details (only national and international awards and recognitions) Name of the award, awarding agency, year of award | |||||||
| SMDP-C2SD project fellow, recipient of Full-time Ph.D. fellowship under Visvesvaraya Ph.D. Scheme, Ministry of Electronics & Information Technology, Government of India, 2016. | |||||||
| Recipient of IEEE sponsored TCVLSI Student Travel Grant in 2017. | |||||||
| Won a Best Paper Award (a Golden Prize of US $100) at IEIE sponsored ICEIC 2017 held in Phuket, Thailand. | |||||||
| Won a Best Paper Award at Springer sponsored ICCACCS 2018 held in Kolkata, India. | |||||||
| Won a Best Paper Award at IEEE sponsored PuneCon 2021 held in Maharashtra, India. | |||||||
| Major International Collaboration Details – Academic Collaboration Details Type of collaboration (Research & publication/Funded Project/consultancy etc.), collaborating institute, year of collaboration | |||||||
| NIL | |||||||
| Major International Collaboration Details – Industry collaboration Details Type of collaboration (Research & publication/Funded Project/consultancy etc.), collaborating industry, year of collaboration | |||||||
| NIL | |||||||
| Other Details | |||||||
| Editorial Experience (if any) | NIL | ||||||
| Personal Website Link (if any) | https://sites.google.com/site/pritambhattacharjeevlsi/ | ||||||
