Prof. Bharath Sreenivasulu V

Assistant Professor

Employee ID52323
Educational details
DegreePassed out yearSpecializationInstitute/University/ College
PhD2022VLSI Devices & CircuitsNIT Warangal, Warangal
M.Tech2016VLSI & ESJNTU Anantapur
B.E./B.Tech2013ECEJNTU Anantapur
Research Details
Areas of SpecializationVLSI Devices & Circuits, Analog and Digital Circuits for Low Power
Scopus ID
H-index (scopus)7
Google Scholar ID‪V. Bharath Sreenivasulu – NIT Warangal (PhD) – ‪Google Scholar
i10 index6
Awards & Recognition Details (only national and international awards and recognitions)
Top cited article from Wiley “Design insights into RF/analog and linearity/distortion of spacer engineered multi‐fin SOI FET for terahertz applications”.
Top Cited article from Elsevier “Characterization and optimization of junctionless gate-all-around vertically stacked nanowire FETs for sub-5 nm technology nodes”.
Gate, UGC NET (Electronic Science) Qualified and MHRD Fellowship during PhD.
Technical Reviewer of

(a)    Semiconductor science and technology

(b)    Nature Scientific Reports

(c)     International journal of RF and Microwave Computer-Aided Engineering

(d)    Silicon

(e)    Material Today Proceedings

Major International Collaboration Details – Academic Collaboration Details
National Yang Ming Chiao Tung University- 2022, (Research & publication)