Centre for Nanoelectronics and VLSI Design

The Centre for Nanoelectronics and VLSI Design (CNVD) was established in March 2020. The centre mainly focuses on the design, modeling and fabrication of nano-scaled devices and integrated circuits for the industrial and consumer electronics applications.

The major research areas of the centre are:

  • Low power digital VLSI circuits
  • Analog integrated circuits
  • MEMS and CMOS integration
  • Nanoscale devices and circuits
  • Hardware security
  • FPGA based systems

Research

  1. Dr. A. Prathiba and Dr. V.S. Kanchana Bhaaskaran, “Secure communication Architecture using Lightweight Algorithms”, published on 12/03/2021. Application No. 202141008503
  2. Dr. Kaustab Ghosh & G. Thriveni, “Graphene field effect transistor design with reduced internal fringe capacitance”, published on 12/03/2021. Application No. 202141008501
  3. S. Umadevi and T. Vigneswaran, “Layout area reduction in full custom integrated circuits”, published on 05/02/2021. Application No. 202141003746
  4. P. Manikandan and B. Bindu, “A fast transient capacitor-less FVF low drop-out regulator with active feed forward compensation”, published on 21/8/2020. Application No. 202041036036.
  5. S. Umadevi and B. Vishweshwara , “Improved row, row & column bypassing multiplier architecture” published on 31/07/2020. Application No. 202041031473.
Principal Investigators

Name of

Agency

Title of projectTotal AmountPeriod of supportCompleted/ongoing
Dr. Prathiba and Dr. V. S.Kanchana BhaaskaranDST -NSMSide Channel Leakage Assessment of Secure Adiabatic Logic Circuit Styles using Deep Learning ApproachRs. 15.6 lakhs2021-2023Ongoing
Dr M Suchetha (PI) and Dr. Ananiah Durai (Co-PI)ISRO, Bangalore.Lower Atmospheric Wind Profile (LAWP)- MST Radar signal processing using Variational Mode Decomposition (VMD) based Adaptive StructuresRs 28.42 Lakhs2019 -2021Ongoing

YEAR: 2021

  • M. M. Sravani, Ananiah Durai .S, Nabihah Ahmad, “FPGA Implementation of Novel Hybrid Hash function SHAES for Digital Signatures”, International Conference on Electrical and Electronic Engineering (Icon3E), Sept. 2021
  • H. Rajanna and Kaustab Ghosh, Minimization of bandstructure dependent dark current in InAs/GaAs quantum dot photodetectors, Superlattices and Microstructures, vol. 156, pp. 106919, Aug. 2021.
  • P. Manikandan and B.Bindu, “A Transient Enhanced Cap-less Low-Dropout Regulator for Wide Range of Load Currents and Capacitances”, Microelectronics Journal, vol. 115, pp. 105207, Sept. 2021.
  • P. Manikandan and B. Bindu, “A Low Power Voltage Spike Detection Circuit for Cap-less LDO,” International Journal of Electronics Letters, published online in July 2021.

 

Title of TalkName & Affiliation of SpeakerCo-ordinatorsDate of Talk
Advancement of OptoelectronicsMr.Anukush Sharma Application Engineer CADFEM,IndiaDr. B.Lakshmi  & Dr. V. R. Balaji19/05/2021
Overview of LP-CMOS Design with LP friendly RTLMr. Madan Gopal Mekala, Corporate Trainer, Star VLSI Services Pvt. Ltd., BLRDr. Anita Angeline A & Dr. Prathiba A19/03/2021
Webinar on Bottom to top design approach for MEMS bio-Sensor designDr Nireekshan Kumar S, Honarary fellow, Mcquarrie University, Sydney, AustraliaDr. Ananiah Durai S09/04/2020
ASIC implementation of Cryptography: Techniques and Security AspectsDr. Nabihah Ahmad, Senior Lecturer, University Tun Hussen Onn, MalaysiaDr Ananiah Durai S & Dr B. Bindu19/11/2020
Applications of Analog Electronics in Medical EquipmentsN Shivaprasad, Senior Manager S/W &F/W, GE Healthcare, BangaloreDr. Ananiah Durai S and Dr. Ravi V28/10/2020
Advanced concepts with verilogMr.Vivian , CDAC, BLRDr. Augusta Sophy & Dr. Anita Angeline02/03/2020
Sl. No.Name of the scholarReg. No.CategorySupervisor
1.V. Damodaran13PHD1178IFTDr. Kaustab Ghosh
2.M.Vijaya Bharathi13PHD1209EPTDr. Kaustab Ghosh
3.Y. M. Aneesh17PHD1017IFTDr. B. Bindu
4.M. M. Sravani17PHD1018IFTDr. Ananiah Durai