Centre for Nanoelectronics and VLSI Design

Research - Conference Publications

  • Balasundaram, V., & Sasipriya, S. (2024, August). Analysis of Pseudo Static Domino Logic with Diode-Connected Footer Transistors. In 2024 4th Asian Conference on Innovation in Technology (ASIANCON)(pp. 1-5). IEEE.
  • Aneesh, Y. M., Bindu, B., & Asenov, A. (2024, March). Single Event Transient Effects in Raised Source/Drain Double-Gate 1-T DRAM. In 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)(pp. 1-3). IEEE.
  • Nivetha, T., & Bindu, B. (2024, May). Variability in switching characteristics of RRAM based 1T-1R configuration and memory array. In 2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)(pp. 1-5). IEEE.
  • Rajashree, R., & Ananiah Durai, S. (2023, February). FPGA Implementation of DNA Computing and Genetic Algorithm Based Image Encryption Technique. In International Conference on Biomedical Engineering Science and Technology (pp. 418-432). Cham: Springer Nature Switzerland.
  • Rishikumar, N. A., & Sasipriya, P. (2023, December). Design and Evaluation of Low Power Error Tolerant Adder. In 2023 International Conference on Next Generation Electronics (NEleX) (pp. 1-6). IEEE.
  • Arun, V., & Kumar, H. (2024, May). Circuit Techniques for High Performance in CDDK Domino Logic. In 2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA) (pp. 1-4). IEEE.
  • A. Borah, L. L. Saju and A. S. B. P, “Implementation of Neural Network using Posit Arithmetic Circuits,” 2023 4th International Conference on Intelligent Technologies (CONIT), Bangalore, India, 2024, pp. 1-5, doi: 10.1109/CONIT61985.2024.10627298.
  • Sasipriya, P. (2023, December). Design and Characterization of Standard Cell Libraries for Optimal Subthreshold Circuits. In 2023 Innovations in Power and Advanced Computing Technologies (i-PACT) (pp. 1-5). IEEE.
  • Thangavelu, K. D., Murugesan, M. M., Natarajan, B. K., Sreerangasamy, U. D., Palaniappan, S., Balasubramaniam, S., & Kalpana, S. V. (2023, August). Computerization of parking management monitoring system using iot and firebase. In AIP Conference Proceedings (Vol. 2857, No. 1). AIP Publishing.
  • Sharmila, S., Bhuvaneswaran, R. S., Natarajan, K., Prathiba, A., & Vaithiyanathan, D. (2023, October). Hardware Implementation of Block Ciphers–A Case Study on Encrypted Image Transfer Over Universal Asynchronous Receiver Transmitter. In 2023 International Conference on Self Sustainable Artificial Intelligence Systems (ICSSAS) (pp. 1120-1128). IEEE.
  • Lee Mun Feng, Nabihah @ Nornabihah binti Ahmad, Chessda Uttraphan A/I Eh Kan, Ananiah Durai. S, Warsuzarina Mat Jubadi presented the paper entitled “ASIC-Based Facial Emotion Recognition System For Human-Computer Interaction” in International Conference on Electrical & Electronic Engineering 2023 (ICon3E2023), 28th & 29th August 2023.
  • Julee Choudhary, Ananiah Durai. S, Nabihah @ Nornabihah binti Ahmad presented a paper entitled, “Smart Microfluidic Devices For Point-Of-Care Applications”, in International Conference on Electrical & Electronic Engineering 2023 (ICon3E2023), 28th & 29th August 2023.
  • R. Raiashree, S. A. Durai, M. S. Murali, P. Manideep and M. R. Kannan, “Elliptic Curve Scalar Multiplication over Prime Field for both Affine and Jacobian Coordinates,” 2023 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE), Bengaluru, India, 2023, pp. 232-237, doi: 10.1109/IITCEE57236.2023.10090927.
  • Ms.R. Rajashree, S. Ananiah Durai, “Elliptic Curve Scalar Multiplication over prime field for both Affine and Jacobian coordinates”, Intelligent and Innovative Technologies in computing, Electrical and Electronics, Bangalore, January 27 -28, 2023.
  • M M Sravani, S Ananiah Durai, M Prathyusha Reddy, G Sowjanya, A Nabihah. ,”FPGA Implementation of Masked-AE$HA-2 for Digital Signature Application”, 5th International Joint Conference on Advances in Computational Intelligence (IJCACI), Bangladesh, October 2021.
  • M. Sravani, S Ananiah Durai, Nabhiah A,” FPGA Implementation of Novel Hybrid Hash function SHѦES for Digital Signatures”, 4th International conference on Electrical and electronic engineering (ICon3E 2021) at Malaysia, pp.62, September 6 &7, 2021.
  • Pal, Srijani, Divya S. Salimath, Kuntal Sarkar, S. Hemavathy, and VS Kanchana Bhaaskaran. “TEL Based Pre-Scaler Design.” In 2022 IEEE Delhi Section Conference (DELCON), pp. 1-5. IEEE, 2022.
  • Singh, Nikhil, Siddharth Shekhar, and Anita Angeline. “Schmitt Trigger Designs Using Domino Logic Style.” ECS Transactions 107, no. 1, pp. 8885, 2022.
  • Rout, Ansuman, Sagar Dn, Anita Angeline. A, Sasipriya.P, “Transmission Gate based Keeper Control for Domino Logic Circuits” In Proceedings of the 2022 Fourteenth International Conference on Contemporary Computing, pp. 673-678. 2022.
  • Sharmin Sheikh, Sirsha Das & B. Lakshmi,” Junctionless TFET Based SRAM for Low Power Applications”, proceedings in IEEE conference, pp. 1-5, July 2022.
  • Banu, Anjana Jyothi, A. Prathiba, and V S Kanchana Bhaskaran. “Optimized Implementation of PRESENT 8-bit S-box structure in Secure Adiabatic Logic.” In 2022 6th International Conference on Trends in Electronics and Informatics (ICOEI), pp. 818-824. IEEE, 2022.
  • Anudeep Varma, C, Sasipriya P, “Low power SRAM using adiabatic logic”, Journal of Physics: Conference Series, vol. 1716(1), pp. 012037, 2021.
  • Pal, Srijani, Divya S. Salimath, Banusha Chandran, A. Anita Angeline, and VS Kanchana Bhaaskaran, “Low Power Memory System Design Using Power Gated SRAM Cell.” In IOP Conference Series: Materials Science and Engineering, vol. 1187, no. 1, p. 012008. IOP Publishing, 2021.
  • K. Annarose, D. Chandra, A. Ravi Sankar and S. Umadevi, “Delay Estimation of MOSFET- and FINFET-based Hybrid Adders,” 2022 International Conference on Innovative Trends in Information Technology (ICITIIT), pp. 1-5, 2022.
  • Surbhi Rathore , Indrani Bairagi and B Lakshmi, “Investigation of DC Parameters of Double Gate Tunnel Field Effect Transistor (DG-TFET) for different Gate Dielectrics”, 2020 International Conference for Emerging Technology (INCET), Aug. 2020.
  • Kalavathi Devi. T, Mouleeshuwarapprabhu. R, Uma Devi. S, Sakthivel. P, Poojashri. V, Swetha. A, Vasuki. P”Sensor Technology and Regulation method for Sustaining the pH value in Sugar Mechanized Process,” 2021 Fourth International Conference on Electrical, Computer and Communication Technologies (ICECCT), pp. 1-5, 2021.
  • Patri Sanjana, Mehana Ramesh, Anushka Kale, Anita Angeline and Sasipriya P, “Design and Evaluation of Error tolerant booth multipliers for Image processing applications”, 4th International Conference on Smart Systems and Inventive Technology (ICCSSIT’22), 2022.
  • Mummudi Murasu M , Sanjana Sujith , Anita Angeline.A , Sasi Priya.P. , V S Kanchana Bhaaskaran “High Performance Wallace Tree Multiplier Using Majority Gate Based Adder”, IOP Conference Series: Materials Science and Engineering, Vol. 1187, No. 1, Sept. 2021.
  • S S Kirankolluri and S Ananiah Durai, “Design and Implementation of Wearable Patient Health Monitoring System using WBAN & IoT”, First International Conference on Technologies for Smart Green Connected Society (ICTSGS), India, Nov. 29-30, 2021.
  • S Aaronjames and S Ananiah Durai, ‘Review of Invasive & Minimally Invasive Techniques for Biomedical applications: Design Aspects’, First International Conference on Technologies for Smart Green Connected Society (ICTSGS), India, Nov. 29-30, 2021.
  • R Rajashree and S Ananiah Durai, ‘A Comprehensive Survey on Different Lightweight Asymmetric Key Cryptographic algorithm for Resource Constrained Devices’, First International Conference on Technologies for Smart Green Connected Society (ICTSGS), India, Nov. 29-30, 2021.
  • R Pugazhenthi and S Ananiah Durai, “Design of dual transduction-based CMOS-MEMS Electronic Stethoscope”, First International Conference on Technologies for Smart Green Connected Society (ICTSGS), India, Nov. 29-30, 2021.